Senior Digital Verification Engineer

Overview

As a Digital Verification Engineer, you will validate complex ASICs/SoCs using advanced verification methods and AI-assisted workflows. You’ll build reusable verification environments, collaborate across international teams, and influence the full product lifecycle from concept to qualification. Your work ensures first-time-right silicon quality and reliability while contributing to cutting-edge automotive and consumer semiconductor solutions.

Retribuzione / Benefits performance-related bonus

additional benefits

Responsabilità Design and maintain scalable verification environments for complex ICs to accelerate silicon bring-up

Apply functional and formal verification techniques to verify digital designs and improve product reliability

Collaborate with international engineering teams across locations

Contribute across the full product lifecycle from concept through design, verification, and qualification

Document and improve verification methodologies and processes to raise efficiency and knowledge sharing

Requisiti fondamentali 5+ years of ASIC/SoC verification experience

Expertise in UVM, formal verification, and directed verification

Development and debugging of verification environments for complex Mixed-Signal or SoC designs

Hands-on experience with state-of-the-art simulation, verification, and EDA tools

Analog and mixed-signal modeling (wreal, MATLAB/Simulink, SystemC)

Power-aware verification and UPF methodologies

Scripting with Python, Tcl or similar

Interest in AI-assisted engineering workflows to improve verification efficiency

Proficiency in English (C1)

Degree(s) in electrical engineering, computer science or equivalent

passion for technology, innovation and quality

curiosity and creativity

proactive mindset

UVM

formal verification

directed verification