SoC/FPGA Engineer

Overview

In this role you drive the architecture, design and validation of ASICs for optical modules within Nokia's Optics Subsystems. You will work in an international SoC team to push higher transmission bandwidth while reducing power and size. You’ll translate standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design, firmware and systems teams. This is a hands-on, impact-focused opportunity to shape next-generation coherent transmission technologies.

Retribuzione / Benefits Flexible and hybrid working schemes

Maternity and paternity leave

Life insurance

Well-being programs

NERGs and coaching/mentors

Learning and career growth opportunities

Responsabilità Architect, specify, design and test ASICs for optical modules.

Translate standards into framer architecture and optimize RTL/verification flows.

Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization.

Mentor junior engineers and contribute to team knowledge sharing.

Collaborate with systems, hardware, software and firmware teams across Nokia locations.

Contribute to Framer development flow and integrate IPs, with a focus on efficiency and QoR.

Requisiti fondamentali Master’s degree or PhD in Electronic Engineering, Microelectronics, Telecommunication Engineering or equivalent

Strong knowledge of IEEE transmission standards (IEEE 802.3 focus) and Ethernet rates above 100G

Proven experience in ASIC design and verification and access to toolchains (Synopsys, Mentor, Cadence)

Proficiency in VHDL, Verilog, SystemVerilog; TCL and Python scripting

RTL design and verification experience with emphasis on high-performance, low-power ASICs

UVM verification experience is a plus

Basic knowledge of ECC theory and algorithms

Basic firmware development knowledge (C/C++, drivers, APIs); advanced skills a plus

Good written and spoken English; strong collaboration with international partners

Excellent communication skills

Cross-functional collaboration

Mentoring and technical leadership

ASIC design and verification workflows

RTL design (VHDL/Verilog/SystemVerilog)

UVM (plus)